1. Field of Invention
The present invention relates to a structure of a semiconductor device.
2. Description of Related Art
As the rapid development of semiconductor devices, high performance, high level of integration, low cost and slim shape have become the goals in designing electronic products. Accordingly, different devices with different functions are fabricated in one chip to meet the above-mentioned goals, so that the pattern density is varied in the same chip.
In the etching process, it is known that the etched profile is affected by the pattern density. Certain semiconductor devices, such as a non-volatile memory, have an open area and a dense area. Therefore, the profile of the edge pattern in the dense area is different from that of the other patterns in the same.
For example, the method of forming the non-volatile memory includes subsequently forming an oxide-nitride-oxide (ONO) composite layer, a polysilicon layer and a patterned photoresist layer on a substrate. Thereafter, an etching process is performed to the polysilicon layer, using the patterned photoresist layer as a mask, so as to form a patterned polysilicon layer having an open area and a dense area. During the step of forming the patterned polysilicon layer, polymers heavily accumulate on the open area, so that the pattern at the edge of the dense area has an inclined sidewall facing the open area, and the bottom width thereof is greater than that of the other patterns in the dense area. Further, the bottom width is proportional to the bottom area, and the bottom area plays an important role in the operation speed. Hence, different bottom widths result in different operation speeds, and errors may occur during the operation of erasing or programming.